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19-3175; Rev 1; 7/04
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers
General Description
The MAX5069 is a high-frequency, current-mode, pulse-width modulation (PWM) controller (with dual MOSFET drivers) that integrates all the building blocks necessary for implementing AC-DC or DC-DC fixed-frequency power supplies. Isolated or nonisolated pushpull and half/full-bridge power supplies are easily constructed using either primary- or secondary-side regulation. Current-mode control with leading-edge blanking simplifies control-loop design and a programmable internal slope-compensation circuit stabilizes the current loop when operating at duty cycles above 50%. An input undervoltage lockout (UVLO) programs the input-supply startup voltage and ensures proper operation during brownout conditions. A single external resistor programs the oscillator frequency from 50kHz to 2.5MHz. The MAX5069A/D provide a SYNC input for synchronization to an external clock. The maximum FET-driver duty cycle for the MAX5069 is 50%. Programmable dead time allows additional flexibility in optimizing magnetic design and overcoming parasitic effects. Programmable hiccup current limit provides additional protection under severe faults. The MAX5069 is specified over the -40C to +125C automotive temperature range and is available in a 16-pin thermally enhanced TSSOP-EP package. Refer to the MAX5068 data sheet for single FET-driver applications. Warning: The MAX5069 is designed to work with high voltages. Exercise caution.
Features
Current-Mode Control with 47A (typ) Startup Current Oscillator Frequency Programmable to 2.5MHz Resistor-Programmable 4.5% Accurate Switching Frequency Dual Gate-Drive Output for Half/Full-Bridge or Push-Pull Applications Rectified 85VAC to 265VAC, or 36VDC to 72VDC Input (MAX5069A/B) Input Directly Driven from 10.8V to 24V (MAX5069C/D) Programmable Dead Time and Slope Compensation Programmable Startup Voltage (UVLO) Programmable UVLO Hysteresis (MAX5069B/C) Frequency Synchronization Input (MAX5069A/D) -40C to +125C Automotive Temperature Range 16-Pin Thermally Enhanced TSSOP-EP Package
MAX5069
Ordering Information
PART MAX5069AAUE MAX5069BAUE MAX5069CAUE MAX5069DAUE TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C PIN-PACKAGE 16 TSSOP-EP* 16 TSSOP-EP* 16 TSSOP-EP* 16 TSSOP-EP*
*EP = Exposed pad.
Applications
Universal-Input AC Power Supplies Isolated Telecom Power Supplies Networking System Power Supplies Server Power Supplies Industrial Power Conversion
TOP VIEW
RT 1 SYNC(HYST*) 2 SCOMP 3 DT 4 UVLO/EN 5 FB 6 COMP 7 FLTINT 8 16 REG5 15 IN 14 VCC
Pin Configuration
MAX5069
13 NDRVA 12 NDRVB 11 PGND 10 AGND 9 CS
TSSOP-EP
*MAX5069B/C.
Selector Guide appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
ABSOLUTE MAXIMUM RATINGS
IN to PGND ............................................................-0.3V to +30V IN to AGND.............................................................-0.3V to +30V VCC to PGND..........................................................-0.3V to +13V VCC to AGND..........................................................-0.3V to +13V FB, COMP, CS, HYST, SYNC, REG5 to AGND ........-0.3V to +6V UVLO/EN, RT, DT, SCOMP, FLTINT to AGND .........-0.3V to +6V NDRVA, NDRVB to PGND ..........................-0.3V to (VCC + 0.3V) AGND to PGND .....................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70C) 16-Pin TSSOP-EP (derate 21.3mW/C above +70C) ...1702mW Operating Temperature Range..........................-40C to +125C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +12V for the MAX5069C/D, VIN = +23.6V for the MAX5069A/B at startup, then reduces to +12V, CIN = CREG5 = 0.1F, CVCC = 1F, RRT = 100k, NDRV_ = floating, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Bootstrap UVLO Wake-Up Level Bootstrap UVLO Shutdown Level UVLO/EN Wake-Up Threshold UVLO/EN Shutdown Threshold HYST FET On-Resistance HYST FET Leakage Current IN Supply Current In Undervoltage Lockout IN Range VCC Regulator Set Point REG5 Output Voltage REG5 Short-Circuit Current Limit IN Supply Current After Startup Shutdown Supply Current GATE DRIVER (NDRVA, NDRVB) Driver Output Impedance Driver Peak Output Current PWM COMPARATOR Comparator Offset Voltage Comparator Propagation Delay Minimum On-Time CURRENT-LIMIT COMPARATOR Current-Limit Trip Threshold VCS 298 314 330 mV VOS_PWM tPD_PWM tON(MIN) VCOMP > VCS VCS = 0.1V Includes tCS_BLANK 1.30 1.60 40 110 2.00 V ns ns ZOUT(LOW) NDRVA/NDRVB sinking 100mA Sinking Sourcing 2 3 1000 650 4 6 ZOUT(HIGH) NDRVA/NDRVB sourcing 25mA INDRV mA SYMBOL VSUVR VSUVF VULR2 VULF2 RDS(ON)_H ILEAK_H ISTART VIN VCCSP VREG5 IREG5_SC IIN IVIN_SD VIN = +24V fSW = 1.25MHz fSW = 100kHz VIN = +10.8V to +24V, VCC sourcing 1A to 25mA IREG5 = 0 to 1mA CONDITIONS VIN rising, MAX5069A/B VIN falling, MAX5069A/B UVLO/EN rising UVLO/EN falling MAX5069B/C only, sinking 50mA, VUVLO/EN = 0V VUVLO/EN = 2V, VHYST = 5V VIN = +19V, VUVLO/EN < VULF2 10.8 7.0 4.85 5.00 18 7 3 90 MIN 19.68 9.05 1.205 TYP 21.6 9.74 1.230 1.18 10 3 47 90 24.0 10.5 5.15 MAX 23.60 10.43 1.255 UNITS V V V V nA A V V V mA mA A
UNDERVOLTAGE LOCKOUT/STARTUP
INTERNAL SUPPLIES (VCC and REG5)
2
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V for the MAX5069C/D, VIN = +23.6V for the MAX5069A/B at startup, then reduces to +12V, CIN = CREG5 = 0.1F, CVCC = 1F, RRT = 100k, NDRV_ = floating, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER CS Input Bias Current CS Blanking Time Propagation Delay from Comparator Input to NDRV_ IN CLAMP VOLTAGE IN Clamp Voltage ERROR AMPLIFIER (FB, COMP) Voltage Gain Unity-Gain Bandwidth Phase Margin FB Input Offset Voltage COMP Clamp Voltage Error-Amplifier Output Current Reference Voltage Input Bias Current COMP Short-Circuit Current THERMAL SHUTDOWN Thermal-Shutdown Temperature Thermal Hysteresis SYNC High-Level Voltage SYNC Low-Level Voltage SYNC Input Bias Current Maximum SYNC Frequency SYNC High-Level Pulse Width SYNC Low-Level Pulse Width DIGITAL SOFT-START Soft-Start Duration Reference-Voltage Step Reference-Voltage Steps During Soft-Start OSCILLATOR Oscillator Frequency Range fOSC fOSC = (1011 / RRT) 50 2500 kHz tSS VSTEP (Note 5) 2047 9.7 127 Cycles mV Steps TSD THYST VIH_SYNC VIL_SYNC IB_SYNC fSYNC tSYNC_HI tSYNC_LO fOSC = 2.5MHz (Note 4) 3.125 30 30 10 2.4 0.4 +170 25 C C V V nA MHz ns ns AV BW PM VOS_FB VCOMP ICOMP VREF IB_EA ICOMP_SC High Low Sinking or sourcing +25C TA +125C (Note 3) -40C TA +125C (Note 3) 2.6 0.4 0.5 1.215 1.205 1.230 1.230 100 12 1.245 1.242 300 RCOMP = 100k to AGND RCOMP = 100k to AGND, CLOAD = 100pF to AGND RCOMP = 100k to AGND, CLOAD = 100pF to AGND 80 5 65 3 3.8 1.1 dB MHz Degrees mV V mA V nA mA VIN_CLAMP IN sinking 2mA (Note 2) 24.0 26.0 29.0 V SYMBOL IB_CL tCS_BLANK tPD_CL 50mV overdrive VCS = 0V CONDITIONS MIN 0 70 40 TYP MAX +2 UNITS A ns ns
MAX5069
OSCILLATOR SYNC INPUT (MAX5069A/D only)
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3
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +12V for the MAX5069C/D, VIN = +23.6V for the MAX5069A/B at startup, then reduces to +12V, CIN = CREG5 = 0.1F, CVCC = 1F, RRT = 100k, NDRV_ = floating, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER NDRV_ Switching Frequency RT Voltage SYMBOL fSW VRT CONDITIONS fSW = 1011 / (2 x RRT) 40k < RRT < 500k TA = +25C Oscillator Accuracy TA = -40C to +125C Maximum Duty Cycle DEAD-TIME CONTROL (DT) Dead Time Dead-Time Disable Voltage Dead-Time Regulation Voltage FLTINT Source Current FLTINT Shutdown Threshold FLTINT Restart Threshold SLOPE COMPENSATION Slope Compensation Slope-Compensation Range Slope-Compensation Voltage Range VSLOPE VSLOPER VSCOMP CSLOPE = 100pf, RT = 110k 0 0 15 90 2.7 mV/s mV/s V tDT VDT_DISABLE VDT IFLTINT VFLTINT_SD VFLTINT_RS VFLTINT = 0V VFLTINT rising VFLTINT falling RDT = 24.9k VREG5 0.5V 1.23 60 2.8 1.6 60 ns V V A V V DMAX DT connected to REG5 fOSC 500kHz fOSC > 500kHz fOSC 500kHz fOSC > 500kHz -2.5 -4 -4.5 -6 100 MIN 25 2.0 +2.5 +4 +4.5 +6 % % TYP MAX 1250 UNITS kHz V
INTEGRATING FAULT PROTECTION (FLTINT)
Note 1: The MAX5069 is 100% tested at TA = +25C. All limits over temperature are guaranteed by design. Note 2: The MAX5069A/B are intended for use in universal-input power supplies. The internal clamp circuit is used to prevent the bootstrap capacitor (C1 in Figure 1) from charging to a voltage beyond the absolute maximum rating of the device when UVLO/EN is low. The maximum current to VIN (hence to clamp) when UVLO is low (device is in shutdown) must be externally limited to 2mA. Clamp currents higher than 2mA may result in clamp voltages higher than 30V, thus exceeding the absolute maximum rating for VIN. For the MAX5069C/D, do not exceed the 24V maximum operating voltage of the device. Note 3: Reference voltage (VREF) is measured with FB connected to COMP (see the Functional Diagram). Note 4: The SYNC frequency must be at least 25% higher than the programmed oscillator frequency. Note 5: The internal oscillator clock cycle.
4
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Typical Operating Characteristics
(VIN = +23.6V for MAX5069A/B at startup, then reduces to +12V, VIN = +12V for the MAX5069C/D, CIN = CREG5 = 0.1F, CVCC = 1F, RRT = 100k, NDRV_ = floating, VFB = 0V, VCOMP = floating, VCS = 0V, TA = +25C, unless otherwise noted.)
BOOTSTRAP UVLO WAKE-UP LEVEL vs. TEMPERATURE
MAX5069 toc01
BOOTSTRAP UVLO SHUTDOWN LEVEL vs. TEMPERATURE
MAX5069 toc02
UVLO/EN WAKE-UP THRESHOLD vs. TEMPERATURE
UVLO/EN RISING
MAX5069 toc03
21.6 21.5 21.4 21.3 21.2 21.1 21.0
MAX5069A/B
10.0
MAX5069A/B
1.245
9.9
1.240
9.7
UVLO/EN (V) -40 -15 10 35 60 85 110
9.8 VIN (V) VIN (V)
1.235
1.230
9.6
1.225
9.5 -40 -15 10 35 60 85 110 TEMPERATURE (C) TEMPERATURE (C)
1.220 -40 -15 10 35 60 85 110 TEMPERATURE (C)
UVLO/EN SHUTDOWN THRESHOLD vs. TEMPERATURE
MAX5069 toc04
VIN SUPPLY CURRENT IN UNDERVOLTAGE LOCKOUT vs. TEMPERATURE
MAX5069 toc05
VIN SUPPLY CURRENT AFTER STARTUP vs. TEMPERATURE
VIN = 24V 7 6 fSW = 500kHz fSW = 250kHz fSW = 1.25MHz
MAX5069 toc06 MAX5069 toc09
1.20 1.19 1.18 1.17 UVLO/EN (V)
UVLO/EN FALLING
60
56
VIN = 19V WHEN IN BOOTSTRAP UVLO (MAX5069A/B) UVLO/EN (MAX5069C/D) IS LOW
8
ISTART (A)
IIN (mA)
1.16 1.15 1.14 1.13 1.12 1.11 1.10 -40 -15 10 35 60 85 110 TEMPERATURE (C)
52
5 4 3
48
44 2 fSW = 50kHz 40 -40 -15 10 35 60 85 110 TEMPERATURE (C) 1 -40 -15 10 35 60 85 110 TEMPERATURE (C) fSW = 100kHz
VCC vs. TEMPERATURE
MAX5069 toc07
REG5 OUTPUT VOLTAGE vs. OUTPUT CURRENT
MAX5069 toc08
REG5 vs. TEMPERATURE
5.00 4.99 4.98 4.97 4.96 REG5 (V) 1mA LOAD VIN = 10.8V 100A LOAD
10.0 9.7 9.4 9.1 VIN = 19V, IIN = 25mA VIN = 19V, IIN = 10mA
4.980 RRT = 100k 4.975 4.970 REG5 (V) 4.965 4.960
VCC (V)
8.8 8.5 8.2 7.9 7.6 7.3 7.0 -40 -15 10 35 60 85 110 TEMPERATURE (C) VIN = 10.8V, IIN = 25mA VIN = 10.8V, IIN = 10mA
4.95 4.94 4.93 4.92 4.91
4.955 4.950 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 OUTPUT CURRENT (mA)
4.90 -40 -15 10 35 60 85 110 TEMPERATURE (C)
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5
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Typical Operating Characteristics (continued)
(VIN = +23.6V for MAX5069A/B at startup, then reduces to +12V, VIN = +12V for the MAX5069C/D, CIN = CREG5 = 0.1F, CVCC = 1F, RRT = 100k, NDRV_ = floating, VFB = 0V, VCOMP = floating, VCS = 0V, TA = +25C, unless otherwise noted.)
CS TRIP THRESHOLD vs. TEMPERATURE
MAX5069 toc10 MAX5069 toc11
REG5 OUTPUT VOLTAGE vs. VIN
4.985 4.984 4.983 4.982 REG5 (V) 4.981 4.980 4.979 4.978 4.977 4.976 4.975 10 12 14 16 18 20 22 24 VIN (V) IREG5 = 100A 330 327 CS TRIP THRESHOLD (mV) 324 321 318 315 312 309 306 303 300 -40 -15
SWITCHING FREQUENCY vs. TEMPERATURE
525 SWITCHING FREQUENCY (kHz) 520 515 510 505 500 495 490 485 -3 MEAN +3 fSW = 500kHz TOTAL NUMBER OF DEVICES = 200
MAX5069 toc12 MAX5069 toc15
530
10
35
60
85
110
480 -40
-15
10
35
60
85
110
TEMPERATURE (C)
TEMPERATURE (C)
PROPAGATION DELAY FROM CS COMPARATOR INPUT TO NDRV vs. TEMPERATURE
MAX5069 toc13
INPUT CURRENT vs. INPUT CLAMP VOLTAGE
MAX5069 toc14
INPUT CLAMP VOLTAGE vs. TEMPERATURE
27.0 26.8 INPUT CLAMP VOLTAGE (V) 26.6 26.4 26.2 26.0 25.8 25.6 25.4 ISINK = 2mA
50 48 PROPAGATION DELAY (ns) 46 44 42 40 38 36 34 32 30 -40 -15 10 35 60 85 110 TEMPERATURE (C)
14 12 INPUT CURRENT (mA) 10 8 6 4 2 0
25.2 25.0 10.0 12.5 15.0 17.5 20.0 22.5 25.0 27.5 30.0 INPUT CLAMP VOLTAGE (V) -40 -15 10 35 60 85 110 TEMPERATURE (C)
NDRVA/NDRVB OUTPUT IMPEDANCE vs. TEMPERATURE
MAX5069 toc16
NDRVA/NDRVB OUTPUT IMPEDANCE vs. TEMPERATURE
3.8 3.6 3.4 GAIN (dB) 3.2 RON () 3.0 2.8 2.6 2.4 2.2 2.0 VIN = 24V SOURCING 25mA
MAX5069 toc17
ERROR AMPLIFIER OPEN-LOOP GAIN AND PHASE vs. FREQUENCY
120 100 80 60 40 20 0 -20 -40 PHASE GAIN
MAX5069 toc18
3.0 2.8 2.6 2.4 2.2 RON () 2.0 1.8 1.6 1.4 1.2 1.0
4.0
30 0 -30 -60 -90 -120 -150 -180 -210 PHASE (DEGREES)
VIN = 24V SINKING 100mA
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
0.1
10
1k
100k
10M
TEMPERATURE (C)
TEMPERATURE (C)
FREQUENCY (Hz)
6
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Typical Operating Characteristics (continued)
(VIN = +23.6V for MAX5069A/B at startup, then reduces to +12V, VIN = +12V for the MAX5069C/D, CIN = CREG5 = 0.1F, CVCC = 1F, RRT = 100k, NDRV_ = floating, VFB = 0V, VCOMP = floating, VCS = 0V, TA = +25C, unless otherwise noted.)
NDRVA SWITCHING FREQUENCY (fSW) vs. RRT
MAX5069 toc20
FLTINT CURRENT vs. TEMPERATURE
MAX5069 toc19
HYST RON vs. TEMPERATURE
13.0 12.5 12.0 11.5 11.0 10.5 10.0 9.5 9.0 8.5 8.0 0.01 -40 -15 10 60 85 TEMPERATURE (C) 35 110 fSW (MHz) RON () 0.1 VIN = 24V SINKING 50mA 2 1
62.9 62.8 FLTINT CURRENT (A) 62.7 62.6 62.5 62.4 62.3 62.2 62.1 62.0 -40 -15 10 35 60 85 110 TEMPERATURE (C)
0.03
0.1 RRT (M)
1
2
NDRV SWITCHING FREQUENCY vs. TEMPERATURE
MAX5069 toc22
NDRV SWITCHING FREQUENCY vs. TEMPERATURE
MAX5069 toc23
NDRV SWITCHING FREQUENCY vs. TEMPERATURE
NDRV SWITCHING FREQUENCY (kHz) fSW = 1.25MHz 1.35 1.30 1.25 1.20 1.15 1.10
MAX5069 toc24
52.0 NDRV SWITCHING FREQUENCY (kHz) 51.6 51.2 50.8 50.4 50.0 49.6 49.2 48.8 48.4 48.0 -40 -15 10 35 60 85 110 TEMPERATURE (C) fSW = 50kHz
505 NDRV SWITCHING FREQUENCY (kHz) 504 503 502 501 500 499 498 497 496 495 -50 -25 0 75 TEMPERATURE (C) 25 50 100 fSW = 500kHz
1.40
125
-40
-15
10
35
60
85
110
TEMPERATURE (C)
DEAD TIME vs. TEMPERATURE
MAX5069 toc25
DEAD TIME vs. RDT
180 160 140 TIME (ns) 120 100 80 60 40 20
MAX5069 toc26
70 65 60 TIME (ns) 55 50 45 40 -40 -15 10 35 60 85 110 TEMPERATURE (C) VIN = 24V RDT = 24.9k RRT = 100k
200
0 1 10 RDT (k) 100
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MAX5069 toc21
63.0
7
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Pin Description
PIN MAX5069A MAX5069D 1 2 -- 3 4 5 6 7 MAX5069B MAX5069C 1 -- 2 3 4 5 6 7 NAME FUNCTION Oscillator-Timing Resistor. Connect a resistor from RT to AGND to set the internal oscillator frequency. External-Clock Sync Input. Connect SYNC to AGND when not using an external clock. Hysteresis Input Slope-Compensation Capacitor Connection Dead-Time Resistor Connection. Connect a resistor from DT to AGND to program the output dead time. Connect to REG5 for NDRVA and NDRVB maximum 50% duty cycle. Externally Programmable Undervoltage Lockout. UVLO/EN programs the input start voltage. Connect UVLO/EN to AGND to disable the output. Error-Amplifier Inverting Input Error-Amplifier Output Fault-Integration Input. A capacitor connected to FLTINT charges with an internal 60A current source during persistent current-limit faults. Switching terminates when VFLTINT is 2.8V. An external resistor connected in parallel discharges the capacitor. Switching resumes when VFLTINT drops to 1.6V. Current-Sense Resistor Connection Analog Ground. Connect to PGND. Power Ground. Connect to AGND through a ground plane. Gate-Driver Output B. Connect NDRVB to the gate of the external N-channel FET. Gate-Driver Output A. Connect NDRVA to the gate of the external N-channel FET. 9V Linear-Regulator Output. Decouple VCC with a minimum 1F ceramic capacitor to AGND; also internally connected to the FET drivers. Power-Supply Input. IN provides power for all internal circuitry except the gate driver. Decouple IN with 0.1F to AGND (see the Typical Operating Circuit). 5V Linear-Regulator Output. Decouple REG5 to AGND with 0.1F ceramic capacitor. Exposed Paddle. Connect to GND.
RT SYNC HYST SCOMP DT UVLO/EN FB COMP
8
8
FLTINT
9 10 11 12 13 14 15 16 EP
9 10 11 12 13 14 15 16 EP
CS AGND PGND NDRVB NDRVA VCC IN REG5 PAD
8
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers
Detailed Description
The MAX5069 is a current-mode, dual MOSFET driver, PWM controller designed for isolated and nonisolated push-pull or half-/full-bridge power-supply applications. A bootstrap UVLO with a programmable hysteresis, very low startup, and low operating current result in high-efficiency universal-input power supplies. In addition to the internal bootstrap UVLO, the device also offers programmable input startup and turn-off voltages, programmed through the UVLO/EN pin. The MAX5069 includes a cycle-by-cycle current limit that turns off the gate drive to the external MOSFET during an overcurrent condition. The MAX5069 integrating fault protection reduces average power dissipation during persistent fault conditions (see the Integrating Fault Protection section). The MAX5069 features a very accurate, wide-range, programmable oscillator that simplifies and optimizes the design of the magnetics. The MAX5069A/B are well suited for universal-input (rectified 85VAC to 265VAC) or telecom (-36VDC to -72VDC) power supplies. The MAX5069C/D are well suited for low-input voltage (10.8VDC to 24VDC) power supplies. The MAX5069 high-frequency, universal input, offline/telecom, current-mode PWM controller integrates all the building blocks necessary for implementing ACDC and DC-DC fixed-frequency power supplies. Pushpull and half-/full-bridge isolated or nonisolated power supplies are easily constructed using either primary- or secondary-side regulation. Current-mode control with leading-edge blanking simplifies control-loop design and the programmable slope compensation stabilizes the current loop when operating both FET drivers at a combined 100% duty cycle. An input UVLO programs the input-supply startup voltage and ensures proper operation during brownout conditions. An external voltage-divider programs the supply startup voltage. The MAX5069B/C feature a programmable UVLO hysteresis. The MAX5069A/B feature an additional internal bootstrap UVLO with large hysteresis that requires a minimum startup voltage of 23.6V. The MAX5069A/D start up from a minimum voltage of 10.8V. Internal digital soft-start reduces output-voltage overshoot at startup. A single external resistor programs the switching frequency of each MOSFET driver from 25kHz to 1.25MHz. The MAX5069A/D provide a SYNC input for synchronization to an external clock. The maximum FET driver duty cycle for each driver is limited to 50%. Programmable dead time allows additional flexibility in optimizing magnetic design and overcoming parasitic effects. Integrating fault protection ignores transient overcurrent conditions for a set length of time. The length of time is programmed by an external capacitor. The internal thermal-shutdown circuit protects the device should the junction temperature exceed +170C. Power supplies designed with the MAX5069A/B use a high-value startup resistor, R1, which charges a reservoir capacitor, C1 (Figure 1). During this initial period, while the voltage is less than the internal bootstrap UVLO threshold, the device typically consumes only 47A of quiescent current. This low startup current and the large bootstrap UVLO hysteresis help to minimize the power dissipation across R1 even at the high end of the universal AC input voltage (265VAC). The MAX5069 includes a cycle-by-cycle current limit that turns off the gates to both external MOSFETs during an overcurrent condition. When using the MAX5069A/B in the bootstrap mode (if the power-supply output is shorted), the tertiary winding voltage drops below the 9.74V threshold, causing the UVLO to turn off the gate to the external power MOSFETs. This reinitiates a startup sequence with soft-start.
MAX5069
Current-Mode Control
The MAX5069 offers a current-mode control operation feature, such as leading-edge blanking with a dual internal path that only blanks the sensed current signal applied to the input of the PWM controller. The currentlimit comparator monitors CS at all times and provides cycle-by-cycle current limit without being blanked. The leading-edge blanking of the CS signal prevents the PWM comparator from prematurely terminating the on cycle. The CS signal contains a leading-edge spike that results from the MOSFET's gate charge current, and the capacitive and diode reverse-recovery current of the power circuit. Since this leading-edge spike is normally lower than the current-limit comparator threshold, current limiting is provided under all conditions. Use the MAX5069 in push-pull and half-/full-bridge applications where a large duty cycle is desired. The large duty cycle results in much lower operating primary RMS currents through the MOSFET switches, and in most cases it results in a smaller inductor and output filter capacitor. The MAX5069 adjusted slope compensation allows for easy stabilization of the inner current loop.
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9
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
D3 D1 VOUT
C7 VIN C1 R1
R2 IN C2 FLTINT C3 VCC C4 REG5 R3 RT R4 DT C5 SCOMP CS FB NDRVB NDRVA HYST UVLO/EN
R6 D2 RHYST
MAX5069B
R7
R9
Q2 Q1
R10
R8 R5 C6
AGND PGND COMP
Figure 1. Nonisolated Power Supply with Programmable Input Supply Voltage
Undervoltage Lockout
The MAX5069 features an input voltage UVLO/EN function to enable the PWM controller before any operation can begin. The MAX5069A/D shut down if the voltage at UVLO/EN falls below its 1.18V threshold. The MAX5069B/C also incorporate a UVLO hysteresis input to set the desired turn-off voltage. MAX5069A/D UVLO Adjustment The MAX5069A/D have an input voltage UVLO/EN with a 1.231V threshold. Before any operation can commence, the UVLO/EN voltage must exceed the 1.231V threshold. The UVLO circuit keeps the PWM comparator, ILIM comparator, oscillator, and output drivers shutdown to reduce current consumption (see the Functional Diagram).
Calculate R6 in Figure 2 by using the following formula: V R6 = ON - 1 x R7 VULR2 where VULR2 is the UVLO/EN's 1.231V rising threshold and VON is the desired startup voltage. Choose an R7 value in the 20k range. After a successful startup, the MAX5069A/D shut down if the voltage at UVLO/EN drops below its 1.18V falling threshold. MAX5069B/C UVLO with Programmable Hysteresis In addition to programmable undervoltage lockout during startup, the MAX5069B/C incorporate a UVLO/EN
10
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
VIN
MAX5069A/D
R6 UVLO/EN VHYST = VON - VOFF R7 1.23V 1.18V VOFF VON
Figure 2. Setting the MAX5069A/D Undervoltage Lockout Threshold
Figure 3. MAX5069 Hysteresis
hysteresis that allows the user to set a voltage (VOFF) to disable the controller (see Figure 3). At the beginning of the startup sequence, UVLO/EN is below the 1.23V threshold, and Q1 turns on connecting RHYST to GND (Figure 4). Once the UVLO 1.23V threshold is crossed, Q1 turns off, resulting in the series combination of R6, RHYST, and R7, placing the MAX5069 in normal operating condition. Calculate the turn-on voltage (V ON) by using the following formula: V R6 = ON - 1 x RHYST VULR2 where VULR2 is the UVLO/EN's 1.23V rising threshold. Choose an RHYST value in the 20k range. The MAX5069 turns off when the MAX5069 UVLO/EN falls below the 1.18V falling threshold. The turn-off voltage (VOFF) is then defined as: V R7 = R6 / OFF - 1 - RHYST VULF2 where VULF2 is the 1.18V UVLO/EN falling threshold.
VIN
MAX5069B/C
UVLO/EN
R6
RHYST 1.23V 1.18V Q1 HYST
R7
Figure 4. Setting the MAX5069B/C Turn-On/Turn-Off Voltages
power-up. The MAX5069A/B start when VIN exceeds the bootstrap UVLO threshold of 23.6V. During startup, the UVLO circuit keeps the PWM comparator, ILIM comparator, oscillator, and output drivers shut down to reduce current consumption. Once V IN reaches 23.6V, the UVLO circuit turns on both the PWM and ILIM comparators, as well as the oscillator, and allows the output driver to switch. If VIN drops below 9.7V, the UVLO circuit shuts down the PWM comparator, ILIM comparator, oscillator, and output drivers, returning the MAX5069A/B to the startup mode.
Bootstrap Undervoltage Lockout (MAX5069A/B)
In addition to the externally programmable UVLO function offered by the MAX5069, the MAX5069A/B feature an additional internal bootstrap UVLO for use in highvoltage power supplies (see the Functional Diagram). This allows the device to bootstrap itself during initial
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
MAX5069A/B Startup Operation
Normally, VIN is derived from the tertiary winding of the transformer. However, at startup there is no energy delivered through the transformer; hence, a special bootstrap sequence is required. Figure 5 shows the voltages on VIN and VCC during startup. Initially, both VIN and VCC are 0V. After the input voltage is applied, C1 charges through the startup resistor, R1, to an intermediate voltage (see Figure 1). At this point, the internal regulator begins charging C3 (see Figure 5). Only 47A of the current supplied by R1 is used by the MAX5069A/B. The remaining input current charges C1 and C3. The charging of C3 stops when the VCC voltage reaches approximately 9.5V. The voltage across C1 continues rising until it reaches the wake-up level of 23.6V. Once VIN exceeds the bootstrap UVLO threshold, NDRVA/NDRVB begin switching the MOSFETs and energy is transferred to the secondary and tertiary outputs. If the voltage on the tertiary output builds to higher than 9.74V (the bootstrap UVLO lower threshold), startup ends and sustained operation commences. If VIN drops below 9.74V before startup is complete, the device goes back to low-current UVLO. If this occurs, increase the value of C1 to store enough energy to allow for the voltage at the tertiary winding to build up. Startup Time Considerations for Power Supplies Using the MAX5069A/B The VIN bypass capacitor, C1, supplies current immediately after wakeup (see Figure 1). The size of C1 and the connection configuration of the tertiary winding determine the number of cycles available for startup. Large values of C1 increase the startup time and also supply extra gate charge for more cycles during initial startup. If the value of C1 is too small, VIN drops below 9.74V because NDRVA/NDRVB do not have enough time to switch and build up sufficient voltage across the tertiary output that powers the device. The device goes back into UVLO and does not start. Use low-leakage capacitors for C1 and C3. Generally, offline power supplies keep typical startup times to less than 500ms, even in low-line conditions (85VAC input for universal offline applications or 36VDC for telecom applications). Size the startup resistor, R1, to supply both the maximum startup bias of the device (90A) and the charging current for C1 and C3. The bypass capacitor, C3, must charge to 9.5V, and C1 must charge to 24V, within the desired time period of 500ms. Because of the internal soft-start time of the MAX5069, C1 must store enough charge to deliver current to the device for at least 2047 oscillator clock cycles. To calculate the approximate amount of capacitance required, use the following formula:
12
VCC 2V/div
MAX5069 VIN PIN 5V/div
0V
100ms/div
Figure 5. V IN and V CC During Startup When Using the MAX5069 in Bootstrapped Mode (See Figure 1)
Ig = Qgtot x fSW (IIN + Ig ) x t SS C1 = VHYST where IIN is the MAX5069's internal supply current after startup (3.3mA, typ), Qgtot is the total gate charge for Q1 and Q2, fSW is the MAX5069's programmed output switching frequency, VHYST is the bootstrap UVLO hysteresis (12V), and tss is the internal soft-start time (2047 clock cycles x 1 / fOSC). Example: Ig = (16nC) (250kHz) 4mA fOSC = 500kHz tSS = 2047 x (1 / fOSC) = 4.1ms C1 = (3.3mA + 4mA) (4.1ms) = 2.5F 12V
Use a 4.7F ceramic capacitor for C1. Assuming C1 > C3, calculate the value of R1 as follows: IC1 R1 VSUVR x C1 500ms VIN(MIN) - 0.5 x VSUVR IC1 + ISTART
where V SUVR is the bootstrap UVLO wakeup level (23.6V max), VIN(MIN) is the minimum input supply voltage for the application (36V for telecom), and ISTART is the VIN supply current at startup (90A, max).
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
VOUT
C7 VIN R1 C1 R6 IN C2 FLTINT C3 VCC C4 REG5 R3 RT NDRVA R4 DT C5 SCOMP AGND PGND COMP R5 C6 PS2913 R10 MAX8515 R14 C10 R13 FB CS R8 VCC R12 C8 Q1 NDRVB Q2 UVLO/EN RHYST
R2
MAX5069B
HYST R7
R9
R11
Figure 6. Secondary-Side, Regulated, Isolated Power Supply
For example: 24V x 4.7F = 225A 500ms 36V - 12V R1 = 76k 225A + 90A IC1 =
To minimize power loss on this resistor, choose a higher value for R1 than the one calculated above (if a longer startup time can be tolerated). The above startup method applies to a circuit similar to the one shown in Figure 1. In this circuit, the tertiary winding has the same phase as the secondary windings. Thus, the voltage on the tertiary winding at any given time is proportional to the output voltage. The minimum discharge time of C1 from 22V to 10V must be greater than the soft-start time (tSS).
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Oscillator/Switching Frequency
Use an external resistor at RT to program the MAX5069 internal oscillator frequency from 50kHz to 2.5MHz. The MAX5069 NDRVA/NDRVB switching frequency is one half of the programmed oscillator frequency with a maximum 50% duty cycle. Use the following formula to calculate the internal oscillator frequency: fosc = 10 RRT
11
shorting out the transformer's primary. The MAX5069 allows the dead-time delay required to turn on the NDRVB FET after the NDRVA FET turns off. The dead time can be programmed to a minimum of 30ns to 1 / (0.5 x fSW). Connect a resistor between DT and AGND to set the desired dead time. Calculate the dead time using the following formula: Dead time = 60 x RDT (ns) 29.4
where RDT is in k and the dead time is in ns.
where fOSC is the oscillator frequency and RRT is a resistor connected from RT to AGND. Choose the appropriate resistor at RT to calculate the desired switching frequency (fSW): RRT = 1011 2fSW
External Synchronization (MAX5069A/D)
The MAX5069A/D can be synchronized using an external clock at the SYNC input. For proper frequency synchronization, the SYNC's input frequency must be at least 25% higher than the MAX5069A/D programmed internal oscillator frequency. Connect SYNC to AGND when not using an external clock.
For the maximum 50% duty cycle at NDRVA/NDRVB, connect DT to REG5.
Integrating Fault Protection
The integrating fault-protection feature allows transient overcurrent conditions to be ignored for a programmable amount of time, giving the power supply time to behave like a current source to the load. For example, this can occur under load-current transients when the control loop requests maximum current to keep the output voltage from going out of regulation. Program the fault-integration time by connecting an external suitably sized capacitor to the FLTINT. Under sustained overcurrent faults, the voltage across this capacitor ramps up towards the FLTINT shutdown threshold (typically 2.8V). Once the threshold is reached, the power supply shuts down. A high-value bleed resistor connected in parallel with the FLTINT capacitor allows it to discharge towards the restart threshold (typically 1.6V). Once this threshold is reached, the supply restarts with a new soft-start cycle.
Dual N-Channel MOSFET Switch Driver
The MAX5069 drives two external N-channel MOSFETs in push-pull isolated power supplies. Each MOSFET driver operates with a maximum 50% duty cycle. The NDRV_ outputs are supplied by the internal regulator (VCC), which is internally set to approximately 9.5V. For the universal input voltage range, the MOSFETs used must be able to withstand at least twice the DC level of the high-line input voltage. Both NDRVA and NDRVB can source and sink in excess of 650mA and 1000mA peak current, respectively. Dead-Time Control In typical push-pull designs, it is desirable to add some extra delay between the turning off of one MOSFET and the turning on of the next MOSFET (Figure 7). The extra time ensures that the first MOSFET is fully off when the other MOSFET starts to turn on. This prevents both MOSFETs from being on simultaneously, thus avoiding
SYNC
MAX5069A/D
DEAD TIME NDRVA NDRVB PWM PWM tDT <50% <50%
AGND RT
Figure 7. MAX5069 Dead-Time Timing Diagram 14
Figure 8. External Synchronization of the MAX5069A/D
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers
Note that cycle-by-cycle current limiting is provided at all times by CS with a threshold of 314mV (typ). The fault-integration circuit forces a 60A current onto FLTINT each time that the current-limit comparator is tripped (see the Functional Diagram). Use the following formula to calculate the value of the capacitor necessary for the desired shutdown time of the circuit: I x tSH CFLTINT FLTINT 2.8V where IFLTINT = 60A, tSH is the desired fault-integration time during which current-limit events from the current-limit comparator are ignored. For example, a 0.1F capacitor gives a fault-integration time of 4.7ms. This is an approximate formula. Some testing may be required to fine-tune the actual value of the capacitor. To calculate the recovery time, use the following formula: RFLTINT t RT 0.595 x CFLTINT
Error Amplifier
The MAX5069 includes an internal error amplifier that can regulate the output voltage in the case of a nonisolated power supply (Figure 1). Calculate the output voltage using the following equation: R9 VOUT = 1 + x VREF R10 where VREF = 1.23V. The amplifier's noninverting input internally connects to a digital soft-start reference voltage. This forces the output voltage to come up in an orderly and well-defined manner under all load conditions.
MAX5069
Slope Compensation
The MAX5069 uses an internal-ramp generator for slope compensation. The internal-ramp signal resets at the beginning of each cycle and slews at the rate programmed by the external capacitor connected at SCOMP and the resistor at RT. Adjust the MAX5069 slew rate up to 90mV/s using the following equation: SR = 165 x 10 -6 (mV / s) RRT x CSCOMP
where tRT is the desired recovery time. Choose tRT = 10 x tSH. Typical values for tSH range from a few hundred microseconds to a few milliseconds.
Soft-Start
The MAX5069 soft-start feature allows the load voltage to ramp up in a controlled manner, eliminating outputvoltage overshoot. Soft-start begins after UVLO is deasserted. The voltage applied to the noninverting node of the amplifier ramps from 0 to 1.23V in 2047 oscillator clock cycles (soft-start timeout period). Unlike other devices, the MAX5069 reference voltage to the internal amplifier is soft-started. This method results in superior control of the output voltage under heavy- and light-load conditions.
where RRT is the external resistor at RT that sets the oscillator frequency and CSCOMP is the capacitor at SCOMP.
PWM Comparator
The PWM comparator uses the instantaneous current, the error amplifier, and the slope compensation to determine when to switch NDRVA and NDRVB off. In normal operation, the N-channel MOSFETs turns off when: IPRIMARY x RCS > VEA - VOFFSET - VSCOMP where IPRIMARY is the current through the N-channel MOSFETs, V EA is the output voltage of the internal amplifier, VOFFSET is the 1.6V internal DC offset, and VSCOMP is the ramp function starting at zero and slewing at the programmed slew rate (SR). When using the MAX5069 in a forward-converter configuration, the following conditions must be met to avoid current-loop subharmonic oscillations: K x RCS x VOUT NS x = SR L NP where K = 0.75 and NS and NP are the number of turns on the secondary and primary side of the transformer, respectively. L is the secondary filter inductor. When optimally compensated, the current loop responds to input-voltage transients within one cycle.
15
Internal Regulators
Two internal linear regulators power the MAX5069 internal and external control circuits. VCC powers the external N-channel MOSFETs and is internally set to approximately 9.5V. The REG5 5V regulator has a 1mA sourcing capability and may be used to provide power to external circuitry. Bypass VCC and REG5 with 1F and 0.1F high quality capacitors, respectively. Use lower value ceramics in parallel to bypass other unwanted noise signals. Bootstrapped operation requires startup through a bleed resistor. Do not excessively load the regulators while the MAX5069 is in the power-up mode. Overloading the outputs may cause the MAX5069 to fail upon startup.
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Current Limit
The current-sense resistor (RCS), connected between the source of the MOSFET and ground, sets the current limit. The CS input has a voltage trip level (V CS) of 314mV. Use the following equation to calculate the value of RCS: RCS = VCS IPRI
Applications Information
Layout Recommendations
Keep all PC board traces carrying switching currents as short as possible, and minimize current loops. For universal AC input design, follow all applicable safety regulations. Offline power supplies may require UL, VDE, and other similar agency approvals. Contact these agencies for the latest layout and component rules. Typically, there are two sources of noise emission in a switching power supply: high di/dt loops and high dV/dt surfaces. For example, traces that carry the drain current often form high di/dt loops. Similarly, the heatsink of the MOSFET presents a dV/dt source, thus minimize the surface area of the heatsink as much as possible. To achieve best performance and to avoid ground loops, use a solid ground-plane connection.
where IPRI is the peak current in the primary that flows through the MOSFET at full load. When the voltage produced by this current (through the current-sense resistor) exceeds the current-limit comparator threshold, the MOSFET drivers (NDRVA/ NDRVB) quickly terminate the current on-cycle. In most cases, a small RC filter is required to filter out the leading-edge spike on the sense waveform. Set the corner frequency to a few MHz above the switching frequency.
Selector Guide
PART MAX5069A MAX5069B MAX5069C MAX5069D BOOTSTRAP UVLO Yes Yes No No STARTUP VOLTAGE (V) 23.6 23.6 10.8 10.8 PROGRAMMABLE UVLO HYSTERESIS No Yes Yes No OSCILLATOR SYNC Yes No No Yes
16
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L2 1mH D2 N4148 D3 N4148 D4 N4148 D5 N4148 PGND T1 REG5 R20 C1 REG5 PGND IN Q1 Si7450DP 6T 6T R11 NDRVA NDRVB R12 Q2 Si7450DP PGND R2 3T 3T C5 C6 VCC C7 R1 D1 25CTQ45 L1 10H VOUT 12V UP TO 15A C2 C3 C4
R3
R19
RT
MAX5069B
UVLO/EN
C10
SCOMP
R4
DT
HYST
R5 AGND PGND R13 CS VCC C12 R14 R15 PGND PGND PGND C13 C14
FB
R8
COMP
C8
FLTINT
C16
R17
C11
R10
PGND
PGND R17 PS2911
FB GND MAX8515AEZK-T R16 R21 OUT IN
C17
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers
MAX5069
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C15
Typical Operating Circuit
17
High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers MAX5069
Functional Diagram
HYST**
MAX5069
UVLO/EN
BOOTSTRAP UVLO
21.6V/ 9.74V
UVLO 1.23V/ 1.18V 1.23V REFERENCE IN
VIN CLAMP 26V IN REGULATOR 5V OUT
60A
2.8V/ 1.6V
REG5
Q FLTINT
R S
REG_OK
VCC VCC
CURRENT-LIMIT COMPARATOR
S 314mV 5k CS AGND 70ns BLANKING PWM COMPARATOR OSC + +
Q
NDRVA
*
1.6V
R
NDRVB
OUT SCOMP SLOPE COMPENSATION DEAD TIME OUT 1.23V DIGITAL SOFT-START ERROR AMP FB *MAX5069A/D **MAX5069B/C THERMAL SHUTDOWN
PGND
COMP
SYNC*
RT
DT
Chip Information
TRANSISTOR COUNT: 4266 PROCESS: BiCMOS
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High-Frequency, Current-Mode PWM Controller with Accurate Oscillator and Dual FET Drivers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
TSSOP 4.4mm BODY.EPS
MAX5069
PACKAGE OUTLINE, TSSOP, 4.40 MM BODY EXPOSED PAD
21-0108
D
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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